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Merge pull request #29484 from velonica0:dnn-rvv-winograd-vlen-fix
dnn: fix out-of-bounds access in RVV Winograd kernels when VLEN > 256
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@@ -909,7 +909,10 @@ void impl_accum_F32(const uchar* inwptr_, const uchar* wptr_, uchar* outbuf_, in
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const float* wptr = (const float*)wptr_;
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float* outbuf = (float*)outbuf_;
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CV_Assert(winoIblock == 6 && winoKblock == 4 && winoAtomF32 == 8);
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const size_t vl = __riscv_vsetvlmax_e32m1(); // 8 on VLEN=256
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// One atom is winoAtomF32 == 8 floats, so vl must be 8 regardless of VLEN;
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// vsetvlmax would return VLEN/32 (16 at VLEN=512, 32 at VLEN=1024) and make the
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// atom loads below overlap their neighbours and the stores run past outbuf.
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const size_t vl = __riscv_vsetvl_e32m1(8);
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if (iblock > 3) {
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for (int atom_id = 0; atom_id < winoNatomF32; atom_id++,
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@@ -1039,7 +1042,7 @@ void impl_BtXB_8x8_F32(const float* inptr, int inpstep, uchar* outptr_, int Cg,
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const int winoIblock, const int winoAtomF32)
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{
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float* outptr = (float*)outptr_;
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const size_t vl = __riscv_vsetvlmax_e32m1();
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const size_t vl = __riscv_vsetvl_e32m1(8); // 8x8 tile: exactly 8 lanes, any VLEN
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float tmp[8][8], tmp2[8][8];
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wino_bt8x8_rvv(inptr, inptr+inpstep, inptr+inpstep*2, inptr+inpstep*3,
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@@ -1094,7 +1097,7 @@ void impl_AtXA_8x8_F32(const uchar* inptr_, int inpstep,
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float bias, float minval, float maxval, bool ifMinMaxAct)
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{
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const float* inptr = (const float*)inptr_;
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const size_t vl = __riscv_vsetvlmax_e32m1();
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const size_t vl = __riscv_vsetvl_e32m1(8); // 8-wide winograd rows, any VLEN
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const size_t vl6 = __riscv_vsetvl_e32m1(6);
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float tmp[8][8], tmp2[8][8];
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