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parent 2d15169ab5
author vrooomy <vj.bro.833@gmail.com> 1773655621 +0530 committer vrooomy <vj.bro.833@gmail.com> 1774357668 +0530 added SIMD support for 64 bit float and fallback for 64 bit int removed trailing white-spaces add SIMD optimization for 32 unsinged int and clean fallback for 64u and 64s add SIMD support for 32u and fallback for 64u and 64s changed CalibrateDebevec test threshold to 0.25 (same as ARM) for IPP=NO relaxed threshold to 0.22 conflict resolved
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@@ -288,6 +288,8 @@ TEST(Photo_CalibrateDebevec, regression)
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minMaxLoc(diff, NULL, &max);
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#if defined(__arm__) || defined(__aarch64__)
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ASSERT_LT(max, 0.25);
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#elif !defined(HAVE_IPP)
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ASSERT_LT(max, 0.22);
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#else
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ASSERT_LT(max, 0.15);
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#endif
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