hal_rvv core: Cover more data types for split with native RVV intrinsics #29557
Covering 16-bit, 32-bit and 64-bit split.
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Distransform function IPP migration to HAL in 4.x #29463
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Extracting IPP integaration as HAL for Canny #29434
Backport of : https://github.com/opencv/opencv/pull/29433
**Performance Numbers on Intel(R) Core(TM) i9-11900K:** https://docs.google.com/spreadsheets/d/1RMvUZP1tSQtdjuNQY9JasYmlx1L5iN9XWGhXtG5u1uI/edit?usp=sharing
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Extracting IPP to HAL for matchTemplate function in 4.x #29464
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Filter2D IPP migration to HAL for 4.x #29427
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Extract IPP integration as HAL function for box_filter #29420
Backport of https://github.com/opencv/opencv/pull/29414
**Performance Numbers on Intel(R) Core(TM) i9-11900K:** https://docs.google.com/spreadsheets/d/1kMKiZWh--pH30hqsQo6j1suNw1lfQiKzSankMCMa2FI/edit?usp=sharing
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Defer the u8→i16 widening (vzext) in the pre-screen phase until after
the quick-reject check passes. This avoids 5 unnecessary widen
operations per pixel-strip when the pre-screen rejects (which happens
~70-80% of the time at the default threshold=20).
The approach uses u8mf2 (same VL as i16m1) for the pre-screen
comparison with vssubu/vsaddu for bounds and vmsgtu for unsigned
comparison. When the pre-screen passes, the already-loaded u8mf2
variables are widened to i16m1 for the score computation, reusing
the same data without redundant memory loads.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Reenable ICV and fix#29166#29183
Fixing https://github.com/opencv/opencv/issues/29166 and return back the 2026.0.0 ICV.
Tests are passed locally on Windows machine. Feel free to check if they are passed in bigger test systems.
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KleidiCV update to verison 26.03 #28744
KleidiCV release: https://gitlab.arm.com/kleidi/kleidicv/-/releases/26.03
Tuned DNN test threshold as resize linear produces slightly different result with the new KleidiCV version.
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RISC-V: add RVV convertScale paths for selected depth conversions #29058
### Summary
This PR extends the RISC-V RVV HAL `convertScale` implementation with optimized paths for selected `convertTo()` depth conversions:
- `CV_32F -> CV_8U`
- `CV_16U -> CV_32F`
- `CV_16S -> CV_32F`
The change is confined to `hal/riscv-rvv/src/core/convert_scale.cpp`. It does not modify the generic `convertTo()` implementation or affect dispatch for non-RISC-V targets.
### Rationale
`Mat::convertTo()` reaches architecture-specific implementations through the HAL `convertScale` interface. Adding these paths in the RVV HAL keeps the optimization in the existing backend layer and avoids introducing RISC-V-specific branches into common OpenCV code.
The selected conversions were chosen based on measured benefit and practical relevance. `CV_32F -> CV_8U` provides the largest speedup, while `CV_16U -> CV_32F` and `CV_16S -> CV_32F` provide consistent improvements for common image-processing data paths.
### Benchmark
Tested on Banana Pi BPI-F3, an 8-core RISC-V board with RVV 1.0 support.
Build and test configuration:
- OpenCV `4.14.0-pre`
- Release build
- RVV HAL enabled
- Compiler: `riscv64-unknown-linux-gnu-g++ 14.2.1`
- Test binary: `opencv_perf_core`
- Test filter: `*convertTo*`
- Samples: `--perf_force_samples=20 --perf_min_samples=20`
Benchmark command:
```bash
./opencv_perf_core \
--gtest_filter=*convertTo* \
--perf_force_samples=20 \
--perf_min_samples=20
```
Each benchmark case was measured with 20 forced samples. The baseline/after comparison was repeated to check run-to-run stability. The optimized conversion pairs showed consistent improvements.
Second-run comparison for the optimized pairs:
```text
OPTIMIZED_PAIRS: 24 cases, gmean 2.6009x
CV_32F -> CV_8U: 16.0718x
CV_16U -> CV_32F: 1.2334x
CV_16S -> CV_32F: 1.1376x
```
`CV_32F -> CV_8U` showed the largest improvement, with speedups in the `14.5x` to `18.8x` range across the tested image sizes, channel counts, and alpha values.
### Notes on Measurement
The initial benchmark run showed noise in conversion pairs not touched by this PR, likely due to board-level variance such as frequency scaling, thermal state, or background scheduling.
A second run showed untouched pairs close to neutral:
```text
UNTOUCHED_OTHER: gmean 0.9941x
```
The optimized conversion pairs remained consistently faster across both runs, with no observed regression in the added RVV paths.
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Rvv core norm #29057Fixesopencv/opencv#29052
### Problem
`Core_Norm/ElemWiseTest.accuracy/0` failed on RISC-V with RVV enabled when computing norm for `CV_16S` data.
The reported failing case was:
```text
src[0] ~ 16sC4 3-dim (1 x 116 x 40)
```
The expected norm result was a large positive `double`, but the RVV path returned an incorrect value:
```text
expected: 3370900308417
actual: -173296
```
This indicates that the problem was not in the public `cv::norm()` API, but in the RVV HAL implementation used for the `CV_16S` L2/L2SQR accumulation path.
### Root Cause
The RVV HAL has a specialized implementation for `CV_16S` L2 norm:
```cpp
NormL2_RVV<short, double>
```
The implementation widens `int16` values, squares them, converts the widened products to `float64`, accumulates them in an `f64m8` vector, and finally reduces the vector to a scalar `double`:
```cpp
auto s = __riscv_vfmv_v_f_f64m8(0, vlmax);
...
auto v_mul = __riscv_vwmul(v, v, vl);
s = __riscv_vfadd_tu(s, s, __riscv_vfwcvt_f(v_mul, vl), vl);
...
return __riscv_vfmv_f(__riscv_vfredosum(...));
```
The bug was in the scalar initializer passed to `__riscv_vfredosum`.
Before this patch, the code created an `f64m1` scalar vector but used the maximum vector length for `e32m1`:
```cpp
__riscv_vfmv_s_f_f64m1(0, __riscv_vsetvlmax_e32m1())
```
This is inconsistent: the vector type is `f64m1`, so the VL used to initialize it must correspond to `e64m1`, not `e32m1`.
## Summary
Replace the existing RVV HAL FAST-16 implementation (`hal/riscv-rvv/src/features2d/fast.cpp`) with a score-first approach, achieving **2-4x speedup** over the previous HAL implementation on RISC-V hardware.
## Approach
The previous HAL implementation used a count-based approach (XOR trick + per-pixel bitmask scanning + separate cornerScore computation). This PR replaces it with a **score-first** approach that processes multiple horizontal pixels in parallel using RVV vectors.
Key optimizations:
1. **Score-first approach**: Directly compute corner scores via min/max reduction over all 9-arc windows, then threshold on score. This eliminates the arc-counting pass and the separate `cornerScore` function.
2. **u8 to i16 zero-extension**: Zero-extend pixel values to int16 for natural signed comparison, eliminating the XOR-delta trick and preventing score overflow.
3. **vcompress batch output**: Extract all corner indices in one vector operation instead of per-lane bitmask scanning.
4. **vlen-adaptive**: Uses `vsetvl_e16m1` for dynamic vector length — works on any RVV 1.0 implementation regardless of VLEN (128, 256, 512, etc.) without code changes.
## Performance
Benchmarked by maintainer on **Muse Pi v3.0** (GCC, SpacemiT toolchain v1.0.4):
| Test | Previous HAL (ms) | This PR (ms) | Speedup |
|------|-------------------|--------------|---------|
| FAST-20 NMS=true | 23.06 | 7.99 | **2.89x** |
| FAST-20 NMS=true (orig) | 7.31 | 1.80 | **4.06x** |
| FAST-30 NMS=false | 20.10 | 7.75 | **2.59x** |
| FAST_DEFAULT s2.jpg | 76.94 | 19.06 | **4.04x** |
| ORB_DEFAULT chess9 | 64.46 | 25.43 | **2.53x** |
Both NMS=true and NMS=false cases are supported.
## Files Changed
- **`hal/riscv-rvv/src/features2d/fast.cpp`**: Replaced count-based implementation with score-first approach
- No changes to `modules/features2d/src/fast.cpp` or any other files
## Test Plan
- [x] Built with RISC-V cross-compilation toolchain (GCC 14.2, RVV 1.0)
- [x] Tested on QEMU (rv64, v=true, vlen=256) — correct results for both NMS modes
- [x] Maintainer tested on Muse Pi v3.0 hardware — 2-4x speedup confirmed
- [ ] CI passes on all platforms
Add ARMPL support for DFT Function #28664
- This PR introduces hal/armpl/ with implementation of 1D, 2D DFT and DCT routines using ARM Performance Libraries as a custom HAL replacement for OpenCV's DFT & DCT Function.
- ArmPL MSI package is automatically downloaded and extracted via CMake when building on Windows ARM64, with a WITH_ARMPL option that defaults to ON for that platform.
- Forward and inverse real DFT calls in dxt.cpp are routed through ArmPL when available, with scaling applied only when needed.
- Test error thresholds in test_dxt.cpp are relaxed (from 1e-5 to 2e-4 for float ) to account for numerical differences between ArmPL and OpenCV's reference DFT results.
**Performance Benchmarks :**
<img width="993" height="835" alt="image" src="https://github.com/user-attachments/assets/76def647-6d20-4bce-8bc9-7363e723669f" />
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fix: Guard ndsrvp filter center copy when source span is empty #28915
## Summary
This adds a defensive guard around the centre-region `memcpy` in the ndsrvp HAL filter padding path.
**Description**: Multiple memcpy calls in the ndsrvp HAL filter, bilateral filter, and median blur routines use computed sizes (e.g., cnes * (rborder - j), cn * (rborder - j), src_step * height) without validating that the computed byte count fits within the destination buffer. An attacker supplying a crafted image with manipulated dimensions, channel counts, or border parameters can cause the computed copy size to exceed the allocated destination buffer, resulting in a heap buffer overflow that corrupts adjacent memory.
## Changes
- `hal/ndsrvp/src/filter.cpp`
## Verification
- [x] Build passes
- [x] Scanner re-scan confirms fix
- [x] LLM code review passed
---
*Automated security fix by [OrbisAI Security](https://orbisappsec.com)*
hal/riscv-rvv: implement laplacian #28887
OpenCV Extra: https://github.com/opencv/opencv_extra/pull/1353
An implementation of laplacian for riscv-rvv hal
Added benchmark in perf_laplacian.cpp
The performance is evaluated on K1 by running
./opencv_perf_imgproc --gtest_filter="Perf_Laplacian*"
Results are attached in the figure below.
CV_8U fast path supports ksize=3 with BORDER_CONSTANT/BORDER_REPLICATE; unsupported combinations fall back to default implementation. See performance results bellow.
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Fix IPP warpAffine #28562
The issue is that we compute the inverse transformation and pass that to the HAL, but tell IPP that we use the actual transformation.
https://github.com/opencv/opencv/blob/a269a489b94b84717691533a04f79d9a0e5f479a/modules/imgproc/src/imgwarp.cpp#L2399-L2412
I have added an additional test with `CV_16S` Mats to test the IPP implementation, because right now no other `warpAffine` test enters the IPP branch.
This fixes#28554.
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hal/riscv-rvv: Fix test failures on hardware that implements tail-agnostic as all 1s #28375
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### Summary
Fix test failures in `opencv_test_core` and `opencv_test_imgproc` on hardware that implements the tail-agnostic policy by overwriting tail elements with all 1s
### Root Cause
According to the [RISC-V Vector Extension Specification v1.0](https://github.com/riscvarchive/riscv-v-spec/blob/master/v-spec.adoc#343-vector-tail-agnostic-and-vector-mask-agnostic-vta-and-vma):
> "When a set is marked agnostic, the corresponding set of destination elements in any vector destination operand can either retain the value they previously held, or are overwritten with 1s."
Both `dotProd_32f` and `dotProd_32s` functions use accumulator variables(`s`) that persist across loop iterations, but were using vector intrinsics with tail-agnostic policy. The tail elements can be overwritten with 1s, corrupting the accumulator and producing NaN during the final reduction sum.
### Solution
Changed both functions to use `tail-undisturbed`(`tu`) policy to ensure tail elements remain unchanged across loop iterations.
### Reproduce Steps
The failures can be reproduced using [QEMU](https://gitlab.com/qemu-project/qemu) with `rvv_ma_all_1s=true` and `rvv_ta_all_1s=true` options to emulate hardware implementing tail-agnostic policy as all 1s.
#### Reproduce **`opencv_test_core`** failures:
```
qemu-riscv64 -cpu rv64,zba=true,zbb=true,zbc=true,zbs=true,v=true,vlen=512,elen=64,vext_spec=v1.0,rvv_ma_all_1s=true,rvv_ta_all_1s=true -L '/PATH_TO_SYSROOT/sysroot/' ./opencv_test_core --gtest_filter="Core_DotProduct*"
```
Before the patch:
```
[ FAILED ] Core_DotProduct.accuracy (24 ms)
```
After the patch:
```
[ PASSED ] 1 test.
```
#### Reproduce **`opencv_test_imgproc`** failures:
```
qemu-riscv64 -cpu rv64,zba=true,zbb=true,zbc=true,zbs=true,v=true,vlen=512,elen=64,vext_spec=v1.0,rvv_ma_all_1s=true,rvv_ta_all_1s=true -L '/workspace/riscv/sysroot/' ./opencv_test_imgproc --gtest_filter="fitLine_Modes.accuracy/*"
```
Before the patch
```
[ FAILED ] 24 tests, listed below:
[ FAILED ] fitLine_Modes.accuracy/0, where GetParam() = (13, 1)
[ FAILED ] fitLine_Modes.accuracy/1, where GetParam() = (13, 2)
[ FAILED ] fitLine_Modes.accuracy/2, where GetParam() = (13, 4)
[ FAILED ] fitLine_Modes.accuracy/3, where GetParam() = (13, 5)
[ FAILED ] fitLine_Modes.accuracy/4, where GetParam() = (13, 6)
[ FAILED ] fitLine_Modes.accuracy/5, where GetParam() = (13, 7)
[ FAILED ] fitLine_Modes.accuracy/6, where GetParam() = (21, 1)
[ FAILED ] fitLine_Modes.accuracy/7, where GetParam() = (21, 2)
[ FAILED ] fitLine_Modes.accuracy/8, where GetParam() = (21, 4)
[ FAILED ] fitLine_Modes.accuracy/9, where GetParam() = (21, 5)
[ FAILED ] fitLine_Modes.accuracy/10, where GetParam() = (21, 6)
[ FAILED ] fitLine_Modes.accuracy/11, where GetParam() = (21, 7)
[ FAILED ] fitLine_Modes.accuracy/12, where GetParam() = (12, 1)
[ FAILED ] fitLine_Modes.accuracy/13, where GetParam() = (12, 2)
[ FAILED ] fitLine_Modes.accuracy/14, where GetParam() = (12, 4)
[ FAILED ] fitLine_Modes.accuracy/15, where GetParam() = (12, 5)
[ FAILED ] fitLine_Modes.accuracy/16, where GetParam() = (12, 6)
[ FAILED ] fitLine_Modes.accuracy/17, where GetParam() = (12, 7)
[ FAILED ] fitLine_Modes.accuracy/18, where GetParam() = (20, 1)
[ FAILED ] fitLine_Modes.accuracy/19, where GetParam() = (20, 2)
[ FAILED ] fitLine_Modes.accuracy/20, where GetParam() = (20, 4)
[ FAILED ] fitLine_Modes.accuracy/21, where GetParam() = (20, 5)
[ FAILED ] fitLine_Modes.accuracy/22, where GetParam() = (20, 6)
[ FAILED ] fitLine_Modes.accuracy/23, where GetParam() = (20, 7)
```
After the patch
`[ PASSED ] 24 tests.`
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