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Author SHA1 Message Date
Yuantao Feng c37f54aeed Merge pull request #27343 from fengyuentau:4x/build/fix_more_warnings
build: fix more warnings from recent gcc versions after #27337 #27343

More fixings after https://github.com/opencv/opencv/pull/27337

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2025-05-21 16:12:09 +03:00
Yuantao Feng 166f76d224 Merge pull request #27337 from fengyuentau:4x/build/riscv/fix_warnings
build: fix warnings from recent gcc versions #27337

This PR addresses the following found warnings:
- [x] -Wmaybe-uninitialized
- [x] -Wunused-variable
- [x] -Wsign-compare

Tested building with GCC 14.2 (RISC-V 64).

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2025-05-21 09:28:29 +03:00
Liutong HAN 97abffbdac Merge pull request #27006 from hanliutong:rvv-fix-ui-1024
Fix issues in RISC-V Vector (RVV) Universal Intrinsic #27006

This PR aims to make `opencv_test_core` pass on RVV, via following two parts:

1. Fix bug in Universal Intrinsic when VLEN >= 512:
- `max_nlanes` should be multiplied by 2, because we use LMUL=2 in RVV Universal Intrinsic since #26318.
- Related tests are also expanded to match longer registers
- Relax the precision threshold of `v_erf` to make the tests pass

2. Temporary fix  #26936
- Disable 3 Universal Intrinsic code blocks on GCC
- This is just a temporary fix until we figure out if it's our issue or GCC/something else's

This patch is tested under the following conditions:
- Compier: GCC 14.2, Clang 19.1.7
- Device: Muse-Pi (VLEN=256), QEMU (VLEN=512, 1024)


### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [ ] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2025-03-04 16:49:59 +03:00
Wanli 687e37e6a8 Merge pull request #25892 from WanliZhong:v_sincos
Add support for v_sin and v_cos (Sine and Cosine) #25892

This PR aims to implement `v_sincos(v_float16 x)`, `v_sincos(v_float32 x)` and `v_sincos(v_float64 x)`. 
Merged after https://github.com/opencv/opencv/pull/25891 and https://github.com/opencv/opencv/pull/26023

**NOTE:** 
Also, the patch changes already added `v_exp`, `v_log` and `v_erf` to pass parameters by reference instead of by value, to match API of other universal intrinsics.

TODO:
- [x] double and half float precision
- [x] tests for them
- [x] doc to explain the implementation

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2024-10-10 13:25:12 +03:00
Wanli 783fe72756 Resolve Compilation Error for v_func Function in SIMD Emulator (#25891)
* use 2 parms for now to identify the error

* Revert "use 2 parms for now to identify the error"

This reverts commit 86faf993a7.

* replace += with =

* add v_log ref

* refactor intrin_math code

* Add include guard to `intrin_math.hpp` to prevent multiple inclusions

* rename VX to V; make fp64 impl in neon be optional

* add v_setall, v_setzero for all backends; rewrite the intrin_math

* fix error on rvv_scalable

* let v_erf use v_exp_default_32f function

* 1. replaced 'v_setzero(VecType dummy)' with 'v_setzero_<VecType>()'
2. replaced 'v_setall(LaneType x, VecType dummy)' with 'v_setall_<VecType>(LaneType x)'
3. added tests for the new v_setzero_<> and v_setall_<>.

* gcc does not seem to like static_assert in functions even when they are not used

* trying to fix compile errors in Debug mode on Linux

---------

Co-authored-by: Vadim Pisarevsky <vadim.pisarevsky@gmail.com>
2024-10-02 21:28:48 +03:00
Alexander Smorkalov 04f9e3cd4f Restored removed test_round_pair_f64 test afetr PR 24941. 2024-07-15 12:59:12 +03:00
Yuantao Feng d30b9450c1 Merge pull request #25872 from fengyuentau:core/v_erf
core: add v_erf #25872

This patch adds v_erf, which is needed by https://github.com/opencv/opencv/pull/25147.

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [x] There is a reference to the original bug report and related work
- [x] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [x] The feature is well documented and sample code can be built with the project CMake
2024-07-05 15:46:01 +03:00
Wanli bef6c110a4 Merge pull request #25781 from WanliZhong:v_log
Add support for v_log (Natural Logarithm) #25781

This PR aims to implement `v_log(v_float16 x)`, `v_log(v_float32 x)` and `v_log(v_float64 x)`. 
Merged after https://github.com/opencv/opencv/pull/24941

TODO:
- [x] double and half float precision
- [x] tests for them
- [x] doc to explain the implementation

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2024-07-03 10:59:44 +03:00
Wanli 6e1864e3fc Merge pull request #24941 from WanliZhong:v_exp
Add support for v_exp (exponential) #24941

This PR aims to implement `v_exp(v_float16 x)`, `v_exp(v_float32 x)` and `v_exp(v_float64 x)`.

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2024-07-02 12:32:49 +03:00
HAN Liutong e52540162f Merge pull request #25586 from hanliutong:rvv-64f
Fix v_round and enable unit tests for scalable universal intrinsic 64F type. #25586

This may be a legacy issue from the previous PR #24325. I don't quite remember why the float 64 part of the unit test was not enabled at that time.

Whatever, this patch enables the unit tests for scalable 64F type , and makes the necessary modifications to the RVV backend to make the tests pass.

This patch is compiled by GCC 14 and LLVM 17 &18, and tested on QEMU and k230.

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [ ] I agree to contribute to the project under Apache 2 License.
- [ ] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [ ] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2024-05-21 14:10:19 +03:00
Yuantao Feng 3afe8ddaf8 core: Rename cv::float16_t to cv::hfloat (#25217)
* rename cv::float16_t to cv::fp16_t

* add typedef fp16_t float16_t

* remove zero(), bits() from fp16_t class

* fp16_t -> hfloat

* remove cv::float16_t::fromBits; add hfloatFromBits

* undo changes in conv_winograd_f63.simd.hpp and conv_block.simd.hpp

* undo some changes in dnn
2024-03-21 23:44:19 +03:00
Maksim Shabunin 6fc926ea4d Updated RVV intrinsics and test to remove initializer_list 2024-03-13 21:16:58 +03:00
Liutong HAN a287605c3e Clean up the Universal Intrinsic API. 2023-10-13 19:23:30 +08:00
Kumataro 72bb8bb73c core: arm64: v_round() works with round to nearest, ties to even. 2023-09-04 10:27:55 +03:00
Liutong HAN a00818047f Add missing ”v_popcount“ for RVV and enable tests. 2023-07-11 16:10:27 +08:00
Alexander Smorkalov e4a29d93fe Merge remote-tracking branch 'origin/3.4' into merge-3.4 2023-04-21 10:55:04 +03:00
Alexander Alekhin fe59a5695f core(simd): 64-bit integer EQ/NE without misused 64F guard 2023-02-27 19:51:55 +00:00
Alexander Alekhin be326ff752 build: fix/eliminate MSVC warnings 2022-12-10 12:19:31 +00:00
HAN Liutong df24bd295d Fix v_signmask for RISC-V Vector. 2022-09-23 11:28:50 +00:00
HAN Liutong 7e2c8cc9f4 Add remaining intrinsics. 2022-08-26 07:06:51 +00:00
HAN Liutong b9a1039566 Remove the test log in test_interleave_pq. 2022-08-18 08:01:09 +00:00
HAN Liutong 8dc332721f Add testcases for interleave_p&q and enable others testcases. 2022-08-17 14:39:23 +00:00
HAN Liutong f572ae3474 add missing test cases(v_abs) 2022-08-12 14:13:26 +00:00
HAN Liutong 2fb652ce09 Add testcase for continuous mul and add. 2022-08-12 01:44:30 +00:00
HAN Liutong f0d29cd33c Add more universal intrinsic implementations for RVV. 2022-08-08 02:09:54 +00:00
HAN Liutong 2bd72af2ef Merge pull request #22292 from hanliutong:fix
[GSoC] Fix compilation errors and warnings when using MSVC on Windows.

* Pass reference of the argument.

* Add some cast to suppress warnings.
2022-07-24 12:15:13 +03:00
HAN Liutong 3e3b53f815 Fix compile errors when all SIMD is disabled. 2022-07-21 08:14:32 +00:00
HAN Liutong 0ef803950b Merge pull request #22179 from hanliutong:new-rvv
[GSoC] New universal intrinsic backend for RVV

* Add new rvv backend (partially implemented).

* Modify the framework of Universal Intrinsic.

* Add CV_SIMD macro guards to current UI code.

* Use vlanes() instead of nlanes.

* Modify the UI test.

* Enable the new RVV (scalable) backend.

* Remove whitespace.

* Rename and some others modify.

* Update intrin.hpp but still not work on AVX/SSE

* Update conditional compilation macros.

* Use static variable for vlanes.

* Use max_nlanes for array defining.
2022-07-19 20:02:00 +03:00
Alexander Alekhin b5fcb06a76 core(SIMD): update int64 SSE constructor 2021-10-18 18:59:40 +00:00
Developer-Ecosystem-Engineering 814550d2a6 Merge pull request #20011 from Developer-Ecosystem-Engineering:3.4
Improve performance on Arm64

* Improve performance on Apple silicon

This patch will
- Enable dot product intrinsics for macOS arm64 builds
- Enable for macOS arm64 builds
- Improve HAL primitives
  - reduction (sum, min, max, sad)
  - signmask
  - mul_expand
  - check_any / check_all

Results on a M1 Macbook Pro

* Updates to #20011 based on feedback

  - Removes Apple Silicon specific workarounds
  - Makes #ifdef sections smaller for v_mul_expand cases
  - Moves dot product optimization to compiler optimization check
  - Adds 4x4 matrix transpose optimization

* Remove dotprod and fix v_transpose

Based on the latest, we've removed dotprod entirely and will revisit in a future PR.

Added explicit cats with v_transpose4x4()

This should resolve all opens with this PR

* Remove commented out lines

Remove two extraneous comments
2021-06-01 09:39:55 +03:00
Vitaly Tuzov aab62aa6dd Merge pull request #18952 from terfendail:wui_doc
* Updated UI documentation to address WUI

* Added documentation for vx_ calls

* Removed vx_store operation overload

* Doxyfile updated to enable wide UI

* Enable doxygen documentation for vx_ WUI functions

* Wide intrinsics definition rework

* core: fix SIMD C++ emulator build (supports 128-bit only)
2021-03-30 16:18:03 +00:00
Alexander Alekhin 2b558a3787 core: fix F16C compilation check 2020-11-17 12:22:49 +00:00
Chip Kerchner 301626ba26 Merge pull request #15488 from ChipKerchner:vectorizeMinMax2
Vectorize minMaxIdx functions

* Updated documentation and intrinsic tests for v_reduce

* Add other files back in from the forced push

* Prevent an constant overflow with v_reduce for int8 type

* Another alternative to fix constant overflow warning.

* Fix another compiler warning.

* Update comments and change comparison form to be consistent with other vectorized loops.

* Change return type of v_reduce_min & max for v_uint8 and v_uint16 to be same as lane type.

* Cast v_reduce functions to int to avoid overflow. Reduce number of parameters in MINMAXIDX_REDUCE macro.

* Restore cast type for v_reduce_min & max to LaneType
2020-01-17 19:37:35 +03:00
Alexander Alekhin e180cc050b Merge pull request #16236 from alalek:fix_core_simd_emulator
* core: fix intrin_cpp, allow to build modules with SIMD emulator

* core(arithm): fix v_zero initialization

* core(simd): 'strict' types for binary/bitwise operations

* features2d: avoid aligned load issue in GCC 5.4 with emulated SIMD

* core(simd): alignment checks in SIMD emulator
2020-01-10 21:31:02 +03:00
Alexander Alekhin 70146700aa Merge pull request #15839 from alalek:core_simd_v_setall_template 2019-11-27 19:19:35 +00:00
Everton Constantino 75315fb297 Merge pull request #15494 from everton1984:hal_vector_get_n
Improving VSX performance of integral function

* Adding support for vector get function on VSX datatypes so the
integral function gains a bit of performance.

* Removing get as a datatype member function and implementing a new HAL
instruction v_extract_n to get the n-th element of a vector register.

* Adding SSE/NEON/AVX intrinsics.

* Implement new HAL instruction v_broadcast_element on VSX/AVX/NEON/SSE.

* core(simd): add tests for v_extract_n/v_broadcast_element

- updated docs
- commented out code to repair compilation
- added WASM and MSA default implementations

* core(simd): fix compilation

- x86: avoid _mm256_extract_epi64/32/16/8 with MSVS 2015
- x86: _mm_extract_epi64 is 64-bit only

* cleanup
2019-11-20 13:41:07 +03:00
Alexander Alekhin a893969ec9 core(simd): v_setall template 2019-11-03 12:49:25 +00:00
Chip Kerchner 5a6a49405d Merge pull request #15738 from ChipKerchner:bugInt64x2Comparison
Fixing bug with comparison of v_int64x2 or v_uint64x2

* Casting v_uint64x2 to v_float64x2 and comparing does NOT work in all cases.  Rewrite using epi64 instructions - faster too.

* Fix bad merge.

* Fix equal comparsion for non-SSE4.1. Add test cases for v_int64x2 comparisons.

* Try to fix merge conflict.

* Only test v_int64x2 comparisons if CV_SIMD_64F

* Fix compiler warning.
2019-10-22 16:37:20 +03:00
Chip Kerchner 027769bf5d Merge pull request #15662 from ChipKerchner:addVReverseIntrinsic
* New v_reverse HAL intrinsic for reversing the ordering of a vector

* Fix conflict.

* Try to resolve conflict again.

* Try one more time.

* Add _MM_SHUFFLE. Remove non-vectorize code in SSE2. Fix copy and paste issue with NEON.

* Change v_uint16x8 SSE2 version to use shuffles
2019-10-11 18:34:17 +03:00
Sayed Adel f2fe6f40c2 Merge pull request #15510 from seiko2plus:issue15506
* core: rework and optimize SIMD implementation of dotProd

  - add new universal intrinsics v_dotprod[int32], v_dotprod_expand[u&int8, u&int16, int32], v_cvt_f64(int64)
  - add a boolean param for all v_dotprod&_expand intrinsics that change the behavior of addition order between
    pairs in some platforms in order to reach the maximum optimization when the sum among all lanes is what only matters
  - fix clang build on ppc64le
  - support wide universal intrinsics for dotProd_32s
  - remove raw SIMD and activate universal intrinsics for dotProd_8
  - implement SIMD optimization for dotProd_s16&u16
  - extend performance test data types of dotprod
  - fix GCC VSX workaround of vec_mule and vec_mulo (in little-endian it must be swapped)
  - optimize v_mul_expand(int32) on VSX

* core: remove boolean param from v_dotprod&_expand and implement v_dotprod_fast&v_dotprod_expand_fast

  this changes made depend on "terfendail" review
2019-10-07 22:01:35 +03:00
Vitaly Tuzov d134ec54c5 Extend tests for v_check_any and v_check_all intrinsics 2019-08-28 14:53:31 +03:00
Vitaly Tuzov 3b015dfc7d Merge pull request #14210 from terfendail:wui_512
AVX512 wide universal intrinsics (#14210)

* Added implementation of 512-bit wide universal intrinsics(WIP)

* Added implementation of 512-bit wide universal intrinsics: implemented WUI vector types(WIP)

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented load/store

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented fp16 load/store

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented recombine and zip, implemented non-saturating and saturating arithmetics

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented bit operations

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented comparisons

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented lane shifts and reduction

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented absolute values

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented rounding and cast to float

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented LUT

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented type extension/narrowing and matrix operations

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented load_deinterleave for 2 and 3 channels images

* Added implementation of 512-bit wide universal intrinsics(WIP): reimplemented load_deinterleave for 2- and implemented for 4-channel images

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented store_interleave

* Added implementation of 512-bit wide universal intrinsics(WIP): implemented signmask and checks

* Added implementation of 512-bit wide universal intrinsics(WIP): build fixes

* Added implementation of 512-bit wide universal intrinsics(WIP): reimplemented popcount in case AVX512_BITALG is unavailable

* Added implementation of 512-bit wide universal intrinsics(WIP): reimplemented zip

* Added implementation of 512-bit wide universal intrinsics(WIP): reimplemented rotate for s8 and s16

* Added implementation of 512-bit wide universal intrinsics(WIP): reimplemented interleave/deinterleave for s8 and s16

* Added implementation of 512-bit wide universal intrinsics(WIP): updated v512_set macros

* Added implementation of 512-bit wide universal intrinsics(WIP): fix for GCC wrong _mm512_abs_pd definition

* Added implementation of 512-bit wide universal intrinsics(WIP): reworked v_zip to avoid AVX512_VBMI intrinsics

* Added implementation of 512-bit wide universal intrinsics(WIP): reworked v_invsqrt to avoid AVX512_ER intrinsics

* Added implementation of 512-bit wide universal intrinsics(WIP): reworked v_rotate, v_popcount and interleave/deinterleave for U8 to avoid AVX512_VBMI intrinsics

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed integral image SIMD part

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed warnings

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed load_deinterleave for u8 and u16

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed v_invsqrt accuracy for f64

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed interleave/deinterleave for u32 and u64

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed interleave_pairs, interleave_quads and pack_triplets

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed rotate_left

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed rotate_left/right, part 2

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed 512-wide universal intrinsics based resize

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed findContours by avoiding use of uint64 dependent 512-wide v_signmask()

* Added implementation of 512-bit wide universal intrinsics(WIP): fixed trailing whitespaces

* Added implementation of 512-bit wide universal intrinsics(WIP): reworked specific intrinsic sets dependent parts to check availability of intrinsics based on CPU feature group defines

* Added implementation of 512-bit wide universal intrinsics(WIP):Updated AVX512 implementation of v_popcount to avoid AVX512VPOPCNTDQ intrinsics if unavailable.

* Added implementation of 512-bit wide universal intrinsics(WIP): Fixed universal intrinsics data initialisation, v_mul_wrap, v_floor, v_ceil and v_signmask.

* Added implementation of 512-bit wide universal intrinsics(WIP): Removed hasSIMD512()

* Added implementation of 512-bit wide universal intrinsics(WIP): Fixes for gcc build

* Added implementation of 512-bit wide universal intrinsics(WIP): Reworked v_signmask, v_check_any() and v_check_all() implementation.
2019-06-03 18:05:35 +03:00
Vitaly Tuzov 723165f878 fix for AVX2 version of v_reduce_min intrinsic 2019-05-31 16:14:54 +03:00
Vitaly Tuzov f0fb91f2d4 Fixed v_signmask implementation for AVX2, updated universal intrinsics tests. 2019-05-24 19:34:54 +03:00
Vitaly Tuzov 1220dd4877 Updated v_popcount description, reference implementation and test. 2019-05-14 18:59:40 +03:00
Vitaly Tuzov 18d10d6b86 Fixed v_reduce_sad intrinsics implementation and added tests 2019-04-24 14:53:59 +03:00
Sayed Adel 93ffebc273 core: reimplement SIMD arithmetic, logic and comparison operations into wide universal intrinsics
- initialize arithmetic dispatcher
  - add new universal intrinsic v_absdiffs
  - add new universal intrinsic v_pack_b
  - add accumulate version of universal intrinsic v_round
  - fix sse/avx2:uint8 multiplication overflow
  - reimplement arithmetic, logic and comparison operations into wide universal intrinsics
    with full support for all types
  - reimplement IPP arithmetic, logic and comparison operations in a sperate file arithm_ipp.hpp
  - avoid scalar multiplication if scaling factor eq 1 and use integer multiplication
  - move C arithmetic operations to precomp.hpp and delete [arithm_simd|arithm_core].hpp
  - add compatibility with new opencv4 divide policy
2018-10-30 12:48:31 +02:00
Sayed Adel 5771fd693d Change behaviour of 16-bit multiply operator
- redefine 16-bit multiply operator to perform saturating multiply
    instead of non-saturating multiply
  - implement 8-bit multiply operator to perform saturating multiply
  - implement v_mul_wrap() for 8-bit, 16-bit non-saturating multiply
  - improve performance of v_mul_hi() for VSX
  - update intrin tests with new changes
  - replace unv 16-bit multiplication operator with v_mul_wrap due behavior changes

  - Several improvements depend on vpisarev review

    * initial forward declarations for universal intrinsics
    * move emulating SSE intrinsics into separate file
    * implement v_mul_expand for 8-bit
    * reimplement saturating multiply using v_mul_expand + v_pack
    * map v_expand, v_load_expand, v_load_expand_q to sse4.1
    * fix overflow avx2::v_pack(uint32)
    * implement two universal intrinsics v_expand_low and v_expand_high
2018-10-11 04:35:39 +02:00
Vadim Pisarevsky 80b62a41c6 Merge pull request #12411 from vpisarev:wide_convert
* rewrote Mat::convertTo() and convertScaleAbs() to wide universal intrinsics; added always-available and SIMD-optimized FP16<=>FP32 conversion

* fixed compile warnings

* fix some more compile errors

* slightly relaxed accuracy threshold for int->float conversion (since we now do it using single-precision arithmetics, not double-precision)

* fixed compile errors on iOS, Android and in the baseline C++ version (intrin_cpp.hpp)

* trying to fix ARM-neon builds

* trying to fix ARM-neon builds

* trying to fix ARM-neon builds

* trying to fix ARM-neon builds
2018-09-06 19:36:59 +03:00
Alexander Alekhin 67d46dfc6c core(intrin): restrict FP16 operations
Intrinsics must be effective, so don't declare FP16 type/operations if there is no native support.

- CV_FP16: supports load/store into/from float32
- CV_SIMD_FP16: declares FP16 types and native FP16 operations
2018-08-20 19:24:33 +03:00