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Merge branch 4.x

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This commit is contained in:
Alexander Smorkalov
2023-09-11 13:22:22 +03:00
parent a6748df587 ee867ead1d
commit fdab565711
148 changed files with 2384 additions and 1876 deletions
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modules/core/src/mathfuncs.cpp
+69 -69
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@@ -614,13 +614,13 @@ void polarToCart( InputArray src1, InputArray src2,
{
k = 0;
#if CV_SIMD
int cWidth = v_float32::nlanes;
#if (CV_SIMD || CV_SIMD_SCALABLE)
int cWidth = VTraits<v_float32>::vlanes();
for( ; k <= len - cWidth; k += cWidth )
{
v_float32 v_m = vx_load(mag + k);
v_store(x + k, vx_load(x + k) * v_m);
v_store(y + k, vx_load(y + k) * v_m);
v_store(x + k, v_mul(vx_load(x + k), v_m));
v_store(y + k, v_mul(vx_load(y + k), v_m));
}
vx_cleanup();
#endif
@@ -741,7 +741,7 @@ struct iPow_SIMD
}
};
#if CV_SIMD
#if (CV_SIMD || CV_SIMD_SCALABLE)
template <>
struct iPow_SIMD<uchar, int>
@@ -751,7 +751,7 @@ struct iPow_SIMD<uchar, int>
int i = 0;
v_uint32 v_1 = vx_setall_u32(1u);
for ( ; i <= len - v_uint16::nlanes; i += v_uint16::nlanes)
for ( ; i <= len - VTraits<v_uint16>::vlanes(); i += VTraits<v_uint16>::vlanes())
{
v_uint32 v_a1 = v_1, v_a2 = v_1;
v_uint16 v = vx_load_expand(src + i);
@@ -763,16 +763,16 @@ struct iPow_SIMD<uchar, int>
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v = v_pack(v_a1, v_a2);
v_pack_store(dst + i, v);
@@ -791,7 +791,7 @@ struct iPow_SIMD<schar, int>
int i = 0;
v_int32 v_1 = vx_setall_s32(1);
for ( ; i <= len - v_int16::nlanes; i += v_int16::nlanes)
for ( ; i <= len - VTraits<v_int16>::vlanes(); i += VTraits<v_int16>::vlanes())
{
v_int32 v_a1 = v_1, v_a2 = v_1;
v_int16 v = vx_load_expand(src + i);
@@ -803,16 +803,16 @@ struct iPow_SIMD<schar, int>
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v = v_pack(v_a1, v_a2);
v_pack_store(dst + i, v);
@@ -831,7 +831,7 @@ struct iPow_SIMD<ushort, int>
int i = 0;
v_uint32 v_1 = vx_setall_u32(1u);
for ( ; i <= len - v_uint16::nlanes; i += v_uint16::nlanes)
for ( ; i <= len - VTraits<v_uint16>::vlanes(); i += VTraits<v_uint16>::vlanes())
{
v_uint32 v_a1 = v_1, v_a2 = v_1;
v_uint16 v = vx_load(src + i);
@@ -843,16 +843,16 @@ struct iPow_SIMD<ushort, int>
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v = v_pack(v_a1, v_a2);
v_store(dst + i, v);
@@ -871,7 +871,7 @@ struct iPow_SIMD<short, int>
int i = 0;
v_int32 v_1 = vx_setall_s32(1);
for ( ; i <= len - v_int16::nlanes; i += v_int16::nlanes)
for ( ; i <= len - VTraits<v_int16>::vlanes(); i += VTraits<v_int16>::vlanes())
{
v_int32 v_a1 = v_1, v_a2 = v_1;
v_int16 v = vx_load(src + i);
@@ -883,16 +883,16 @@ struct iPow_SIMD<short, int>
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v = v_pack(v_a1, v_a2);
v_store(dst + i, v);
@@ -911,29 +911,29 @@ struct iPow_SIMD<int, int>
int i = 0;
v_int32 v_1 = vx_setall_s32(1);
for ( ; i <= len - v_int32::nlanes*2; i += v_int32::nlanes*2)
for ( ; i <= len - VTraits<v_int32>::vlanes()*2; i += VTraits<v_int32>::vlanes()*2)
{
v_int32 v_a1 = v_1, v_a2 = v_1;
v_int32 v_b1 = vx_load(src + i), v_b2 = vx_load(src + i + v_int32::nlanes);
v_int32 v_b1 = vx_load(src + i), v_b2 = vx_load(src + i + VTraits<v_int32>::vlanes());
int p = power;
while( p > 1 )
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v_store(dst + i, v_a1);
v_store(dst + i + v_int32::nlanes, v_a2);
v_store(dst + i + VTraits<v_int32>::vlanes(), v_a2);
}
vx_cleanup();
@@ -949,34 +949,34 @@ struct iPow_SIMD<float, float>
int i = 0;
v_float32 v_1 = vx_setall_f32(1.f);
for ( ; i <= len - v_float32::nlanes*2; i += v_float32::nlanes*2)
for ( ; i <= len - VTraits<v_float32>::vlanes()*2; i += VTraits<v_float32>::vlanes()*2)
{
v_float32 v_a1 = v_1, v_a2 = v_1;
v_float32 v_b1 = vx_load(src + i), v_b2 = vx_load(src + i + v_float32::nlanes);
v_float32 v_b1 = vx_load(src + i), v_b2 = vx_load(src + i + VTraits<v_float32>::vlanes());
int p = std::abs(power);
if( power < 0 )
{
v_b1 = v_1 / v_b1;
v_b2 = v_1 / v_b2;
v_b1 = v_div(v_1, v_b1);
v_b2 = v_div(v_1, v_b2);
}
while( p > 1 )
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v_store(dst + i, v_a1);
v_store(dst + i + v_float32::nlanes, v_a2);
v_store(dst + i + VTraits<v_float32>::vlanes(), v_a2);
}
vx_cleanup();
@@ -984,7 +984,7 @@ struct iPow_SIMD<float, float>
}
};
#if CV_SIMD_64F
#if (CV_SIMD_64F || CV_SIMD_SCALABLE_64F)
template <>
struct iPow_SIMD<double, double>
{
@@ -993,34 +993,34 @@ struct iPow_SIMD<double, double>
int i = 0;
v_float64 v_1 = vx_setall_f64(1.);
for ( ; i <= len - v_float64::nlanes*2; i += v_float64::nlanes*2)
for ( ; i <= len - VTraits<v_float64>::vlanes()*2; i += VTraits<v_float64>::vlanes()*2)
{
v_float64 v_a1 = v_1, v_a2 = v_1;
v_float64 v_b1 = vx_load(src + i), v_b2 = vx_load(src + i + v_float64::nlanes);
v_float64 v_b1 = vx_load(src + i), v_b2 = vx_load(src + i + VTraits<v_float64>::vlanes());
int p = std::abs(power);
if( power < 0 )
{
v_b1 = v_1 / v_b1;
v_b2 = v_1 / v_b2;
v_b1 = v_div(v_1, v_b1);
v_b2 = v_div(v_1, v_b2);
}
while( p > 1 )
{
if (p & 1)
{
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
}
v_b1 *= v_b1;
v_b2 *= v_b2;
v_b1 = v_mul(v_b1, v_b1);
v_b2 = v_mul(v_b2, v_b2);
p >>= 1;
}
v_a1 *= v_b1;
v_a2 *= v_b2;
v_a1 = v_mul(v_a1, v_b1);
v_a2 = v_mul(v_a2, v_b2);
v_store(dst + i, v_a1);
v_store(dst + i + v_float64::nlanes, v_a2);
v_store(dst + i + VTraits<v_float64>::vlanes(), v_a2);
}
vx_cleanup();
@@ -1614,7 +1614,7 @@ void patchNaNs( InputOutputArray _a, double _val )
Cv32suf val;
val.f = (float)_val;
#if CV_SIMD
#if (CV_SIMD || CV_SIMD_SCALABLE)
v_int32 v_mask1 = vx_setall_s32(0x7fffffff), v_mask2 = vx_setall_s32(0x7f800000);
v_int32 v_val = vx_setall_s32(val.i);
#endif
@@ -1624,12 +1624,12 @@ void patchNaNs( InputOutputArray _a, double _val )
int* tptr = ptrs[0];
size_t j = 0;
#if CV_SIMD
size_t cWidth = (size_t)v_int32::nlanes;
#if (CV_SIMD || CV_SIMD_SCALABLE)
size_t cWidth = (size_t)VTraits<v_int32>::vlanes();
for ( ; j + cWidth <= len; j += cWidth)
{
v_int32 v_src = vx_load(tptr + j);
v_int32 v_cmp_mask = v_mask2 < (v_src & v_mask1);
v_int32 v_cmp_mask = v_lt(v_mask2, v_and(v_src, v_mask1));
v_int32 v_dst = v_select(v_cmp_mask, v_val, v_src);
v_store(tptr + j, v_dst);
}