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RISC-V: fix compilation in RVV scalable mode

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This commit is contained in:
Maksim Shabunin
2023-09-12 23:13:39 +03:00
parent 416bf3253d
commit c3a37d0fcb
6 changed files with 32 additions and 25 deletions
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modules/core/include/opencv2/core/hal/intrin.hpp
+6 -3
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@@ -720,7 +720,7 @@ namespace CV__SIMD_NAMESPACE {
inline v_int32 vx_load_expand_q(const schar * ptr) { return VXPREFIX(_load_expand_q)(ptr); }
//! @}
#ifndef OPENCV_HAL_HAVE_LOAD_STORE_BFLOAT16
#ifndef OPENCV_HAL_HAVE_PACK_STORE_BFLOAT16
inline v_float32 vx_load_expand(const bfloat16_t* ptr)
{
v_uint32 v = vx_load_expand((const ushort*)ptr);
@@ -730,7 +730,7 @@ namespace CV__SIMD_NAMESPACE {
inline void v_pack_store(const bfloat16_t* ptr, const v_float32& v)
{
v_int32 iv = v_shr<16>(v_reinterpret_as_s32(v));
v_pack_store((short*)ptr, iv);
cv::v_pack_store((short*)ptr, iv);
}
#endif
@@ -967,6 +967,9 @@ namespace CV__SIMD_NAMESPACE {
OPENCV_HAL_WRAP_CMP(v_float64x4)
#endif
#endif
OPENCV_HAL_WRAP_CMP_OP(v_int64, lt, <) \
OPENCV_HAL_WRAP_CMP_OP(v_int64, gt, >) \
//////////// get0 ////////////
#define OPENCV_HAL_WRAP_GRT0(_Tpvec) \
@@ -1110,7 +1113,7 @@ namespace CV__SIMD_NAMESPACE {
#define CV_SIMD 0
#endif
#if (!defined CV_SIMD_64F) || (!CV_SIMD_64F)
#if !CV_SIMD_64F && !CV_SIMD_SCALABLE_64F
typedef struct v_float64 { int dummy; } v_float64;
#endif