From 9bbc890d96cd31056b0d338832682fe2cba440a5 Mon Sep 17 00:00:00 2001 From: Wanli Date: Tue, 12 Dec 2023 20:38:07 +0800 Subject: [PATCH] Merge pull request #24681 from WanliZhong:err_armv8 Fixed armv8 compilation warnings #24681 Fixes the following warning on armv8: ``` warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] ``` Buildbot: https://pullrequest.opencv.org/buildbot/builders/4_x_ARMv8-lin --- .../src/layers/cpu_kernels/convolution.cpp | 31 +++++-------------- .../src/layers/cpu_kernels/convolution.hpp | 2 +- 2 files changed, 8 insertions(+), 25 deletions(-) diff --git a/modules/dnn/src/layers/cpu_kernels/convolution.cpp b/modules/dnn/src/layers/cpu_kernels/convolution.cpp index 649fb88211..c5258ccd91 100644 --- a/modules/dnn/src/layers/cpu_kernels/convolution.cpp +++ b/modules/dnn/src/layers/cpu_kernels/convolution.cpp @@ -492,16 +492,8 @@ static inline void packData8(char*& inpbuf, float*& inptrIn, int& in_w, int& x0, for (int k = 0; k < ksize; k++) { int k1 = ofstab[k]; - float32x4_t v0, v1; - - v0[0] = inptrInC[k1]; - v0[1] = inptrInC[k1 + stride_w]; - v0[2] = inptrInC[k1 + 2*stride_w]; - v0[3] = inptrInC[k1 + 3*stride_w]; - v1[0] = inptrInC[k1 + 4*stride_w]; - v1[1] = inptrInC[k1 + 5*stride_w]; - v1[2] = inptrInC[k1 + 6*stride_w]; - v1[3] = inptrInC[k1 + 7*stride_w]; + float32x4_t v0 = {inptrInC[k1], inptrInC[k1 + stride_w], inptrInC[k1 + 2*stride_w], inptrInC[k1 + 3*stride_w]}; + float32x4_t v1 = {inptrInC[k1 + 4*stride_w], inptrInC[k1 + 5*stride_w], inptrInC[k1 + 6*stride_w], inptrInC[k1 + 7*stride_w]}; vst1q_f16((__fp16*)inpbufC_FP16 + k * CONV_NR_FP16, vcombine_f16(vcvt_f16_f32(v0), vcvt_f16_f32(v1))); } @@ -956,11 +948,8 @@ static inline void packInputData(char* inpbuf_task, float* inp, const int* ofsta { for (int c = 0; c < Cg; c++, inpbuf_ki_FP16 += CONV_NR, inptr_ki += inp_planesize) { - float32x4_t v0, v1; - v0[0] = inptr_ki[0], v0[1] = inptr_ki[2]; - v0[2] = inptr_ki[4], v0[3] = inptr_ki[6]; - v1[0] = inptr_ki[8], v1[1] = inptr_ki[10]; - v1[2] = inptr_ki[12], v1[3] = inptr_ki[14]; + float32x4_t v0 = {inptr_ki[0], inptr_ki[2], inptr_ki[4], inptr_ki[6]}; + float32x4_t v1 = {inptr_ki[8], inptr_ki[10], inptr_ki[12], inptr_ki[14]}; vst1q_f16((__fp16* )inpbuf_ki_FP16, vcombine_f16(vcvt_f16_f32(v0), vcvt_f16_f32(v1))); } } @@ -989,12 +978,8 @@ static inline void packInputData(char* inpbuf_task, float* inp, const int* ofsta { for (int c = 0; c < Cg; c++, inpbuf_ki_FP16 += CONV_NR, inptr_ki += inp_planesize) { - float32x4_t v0, v1; - - v0[0] = inptr_ki[0], v0[1] = inptr_ki[stride_w]; - v0[2] = inptr_ki[stride_w * 2], v0[3] = inptr_ki[stride_w * 3]; - v1[0] = inptr_ki[stride_w * 4], v1[1] = inptr_ki[stride_w * 5]; - v1[2] = inptr_ki[stride_w * 6], v1[3] = inptr_ki[stride_w * 7]; + float32x4_t v0 = {inptr_ki[0], inptr_ki[stride_w], inptr_ki[stride_w * 2], inptr_ki[stride_w * 3]}; + float32x4_t v1 = {inptr_ki[stride_w * 4], inptr_ki[stride_w * 5], inptr_ki[stride_w * 6], inptr_ki[stride_w * 7]}; vst1q_f16((__fp16* )inpbuf_ki_FP16, vcombine_f16(vcvt_f16_f32(v0), vcvt_f16_f32(v1))); } } @@ -1051,9 +1036,7 @@ static inline void packInputData(char* inpbuf_task, float* inp, const int* ofsta { for (int c = 0; c < Cg; c++, inpbuf_ki_FP16 += CONV_NR, inptr_ki += inp_planesize) { - float32x4_t v0; - v0[0] = inptr_ki[0], v0[1] = inptr_ki[stride_w]; - v0[2] = inptr_ki[stride_w * 2], v0[3] = inptr_ki[stride_w * 3]; + float32x4_t v0 = {inptr_ki[0], inptr_ki[stride_w], inptr_ki[stride_w * 2], inptr_ki[stride_w * 3]}; vst1_f16((__fp16* )inpbuf_ki_FP16, vcvt_f16_f32(v0)); } } diff --git a/modules/dnn/src/layers/cpu_kernels/convolution.hpp b/modules/dnn/src/layers/cpu_kernels/convolution.hpp index e3ba4a83a4..e9f169bbaf 100644 --- a/modules/dnn/src/layers/cpu_kernels/convolution.hpp +++ b/modules/dnn/src/layers/cpu_kernels/convolution.hpp @@ -14,7 +14,7 @@ #define CONV_NR_FP32 28 // The FP16 can only be supported by ARM64 and with FP16 FMA supported. -#if CV_FP16 // check FP16 FMA. +#if CV_FP16 && CV_TRY_NEON_FP16 // check FP16 FMA. #define CONV_ARM_FP16 1 #endif