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Merge pull request #23973 from mshabunin:riscv-unaligned-access
RISC-V: fix unaligned loads and stores
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@@ -603,10 +603,10 @@ flipVert( const uchar* src0, size_t sstep, uchar* dst0, size_t dstep, Size size,
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{
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for (; i <= size.width - CV_SIMD_WIDTH; i += CV_SIMD_WIDTH)
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{
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v_int32 t0 = vx_load((int*)(src0 + i));
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v_int32 t1 = vx_load((int*)(src1 + i));
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v_store((int*)(dst0 + i), t1);
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v_store((int*)(dst1 + i), t0);
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v_int32 t0 = v_reinterpret_as_s32(vx_load(src0 + i));
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v_int32 t1 = v_reinterpret_as_s32(vx_load(src1 + i));
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v_store(dst0 + i, v_reinterpret_as_u8(t1));
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v_store(dst1 + i, v_reinterpret_as_u8(t0));
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}
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}
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#if CV_STRONG_ALIGNMENT
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