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Merge pull request #24058 from hanliutong:rewrite-imgporc
Rewrite Universal Intrinsic code by using new API: ImgProc module. #24058 The goal of this series of PRs is to modify the SIMD code blocks guarded by CV_SIMD macro in the `opencv/modules/imgproc` folder: rewrite them by using the new Universal Intrinsic API. For easier review, this PR includes a part of the rewritten code, and another part will be brought in the next PR (coming soon). I tested this patch on RVV (QEMU) and AVX devices, `opencv_test_imgproc` is passed. The patch is partially auto-generated by using the [rewriter](https://github.com/hanliutong/rewriter), related PR https://github.com/opencv/opencv/pull/23885 and https://github.com/opencv/opencv/pull/23980. ### Pull Request Readiness Checklist See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request - [ ] I agree to contribute to the project under Apache 2 License. - [ ] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV - [ ] The PR is proposed to the proper branch - [ ] There is a reference to the original bug report and related work - [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable Patch to opencv_extra has the same branch name. - [ ] The feature is well documented and sample code can be built with the project CMake
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@@ -2053,13 +2053,13 @@ double cv::compareHist( InputArray _H1, InputArray _H2, int method )
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}
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else if( method == CV_COMP_CORREL )
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{
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#if CV_SIMD_64F
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#if (CV_SIMD_64F || CV_SIMD_SCALABLE_64F)
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v_float64 v_s1 = vx_setzero_f64();
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v_float64 v_s2 = vx_setzero_f64();
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v_float64 v_s11 = vx_setzero_f64();
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v_float64 v_s12 = vx_setzero_f64();
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v_float64 v_s22 = vx_setzero_f64();
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for ( ; j <= len - v_float32::nlanes; j += v_float32::nlanes)
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for ( ; j <= len - VTraits<v_float32>::vlanes(); j += VTraits<v_float32>::vlanes())
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{
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v_float32 v_a = vx_load(h1 + j);
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v_float32 v_b = vx_load(h2 + j);
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@@ -2070,8 +2070,8 @@ double cv::compareHist( InputArray _H1, InputArray _H2, int method )
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v_s12 = v_muladd(v_ad, v_bd, v_s12);
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v_s11 = v_muladd(v_ad, v_ad, v_s11);
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v_s22 = v_muladd(v_bd, v_bd, v_s22);
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v_s1 += v_ad;
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v_s2 += v_bd;
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v_s1 = v_add(v_s1, v_ad);
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v_s2 = v_add(v_s2, v_bd);
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// 2-3
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v_ad = v_cvt_f64_high(v_a);
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@@ -2079,8 +2079,8 @@ double cv::compareHist( InputArray _H1, InputArray _H2, int method )
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v_s12 = v_muladd(v_ad, v_bd, v_s12);
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v_s11 = v_muladd(v_ad, v_ad, v_s11);
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v_s22 = v_muladd(v_bd, v_bd, v_s22);
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v_s1 += v_ad;
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v_s2 += v_bd;
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v_s1 = v_add(v_s1, v_ad);
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v_s2 = v_add(v_s2, v_bd);
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}
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s12 += v_reduce_sum(v_s12);
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s11 += v_reduce_sum(v_s11);
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@@ -2124,12 +2124,12 @@ double cv::compareHist( InputArray _H1, InputArray _H2, int method )
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}
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else if( method == CV_COMP_INTERSECT )
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{
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#if CV_SIMD_64F
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#if (CV_SIMD_64F || CV_SIMD_SCALABLE_64F)
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v_float64 v_result = vx_setzero_f64();
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for ( ; j <= len - v_float32::nlanes; j += v_float32::nlanes)
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for ( ; j <= len - VTraits<v_float32>::vlanes(); j += VTraits<v_float32>::vlanes())
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{
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v_float32 v_src = v_min(vx_load(h1 + j), vx_load(h2 + j));
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v_result += v_cvt_f64(v_src) + v_cvt_f64_high(v_src);
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v_result = v_add(v_result, v_add(v_cvt_f64(v_src), v_cvt_f64_high(v_src)));
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}
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result += v_reduce_sum(v_result);
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#elif CV_SIMD
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@@ -2146,26 +2146,26 @@ double cv::compareHist( InputArray _H1, InputArray _H2, int method )
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}
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else if( method == CV_COMP_BHATTACHARYYA )
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{
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#if CV_SIMD_64F
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#if (CV_SIMD_64F || CV_SIMD_SCALABLE_64F)
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v_float64 v_s1 = vx_setzero_f64();
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v_float64 v_s2 = vx_setzero_f64();
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v_float64 v_result = vx_setzero_f64();
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for ( ; j <= len - v_float32::nlanes; j += v_float32::nlanes)
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for ( ; j <= len - VTraits<v_float32>::vlanes(); j += VTraits<v_float32>::vlanes())
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{
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v_float32 v_a = vx_load(h1 + j);
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v_float32 v_b = vx_load(h2 + j);
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v_float64 v_ad = v_cvt_f64(v_a);
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v_float64 v_bd = v_cvt_f64(v_b);
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v_s1 += v_ad;
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v_s2 += v_bd;
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v_result += v_sqrt(v_ad * v_bd);
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v_s1 = v_add(v_s1, v_ad);
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v_s2 = v_add(v_s2, v_bd);
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v_result = v_add(v_result, v_sqrt(v_mul(v_ad, v_bd)));
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v_ad = v_cvt_f64_high(v_a);
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v_bd = v_cvt_f64_high(v_b);
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v_s1 += v_ad;
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v_s2 += v_bd;
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v_result += v_sqrt(v_ad * v_bd);
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v_s1 = v_add(v_s1, v_ad);
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v_s2 = v_add(v_s2, v_bd);
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v_result = v_add(v_result, v_sqrt(v_mul(v_ad, v_bd)));
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}
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s1 += v_reduce_sum(v_s1);
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s2 += v_reduce_sum(v_s2);
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