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Misc. modules/ typos
Found via `codespell`
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@@ -131,7 +131,7 @@ message PriorBoxParameter {
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// Variance for adjusting the prior bboxes.
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repeated float variance = 6;
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// By default, we calculate img_height, img_width, step_x, step_y based on
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// bottom[0] (feat) and bottom[1] (img). Unless these values are explicitely
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// bottom[0] (feat) and bottom[1] (img). Unless these values are explicitly
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// provided.
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// Explicitly provide the img_size.
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optional uint32 img_size = 7;
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@@ -58,7 +58,7 @@ namespace cv {
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namespace dnn {
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CV__DNN_EXPERIMENTAL_NS_BEGIN
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// this option is usefull to run valgrind memory errors detection
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// this option is useful to run valgrind memory errors detection
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static bool DNN_DISABLE_MEMORY_OPTIMIZATIONS = utils::getConfigurationParameterBool("OPENCV_DNN_DISABLE_MEMORY_OPTIMIZATIONS", false);
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using std::vector;
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@@ -911,7 +911,7 @@ struct Net::Impl
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int id = getLayerId(layerName);
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if (id < 0)
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CV_Error(Error::StsError, "Requsted layer \"" + layerName + "\" not found");
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CV_Error(Error::StsError, "Requested layer \"" + layerName + "\" not found");
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return getLayerData(id);
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}
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@@ -1897,7 +1897,7 @@ struct Net::Impl
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if ((size_t)pin.oid >= ld.outputBlobs.size())
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{
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CV_Error(Error::StsOutOfRange, format("Layer \"%s\" produce only %d outputs, "
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"the #%d was requsted", ld.name.c_str(),
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"the #%d was requested", ld.name.c_str(),
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ld.outputBlobs.size(), pin.oid));
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}
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if (preferableTarget != DNN_TARGET_CPU)
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@@ -88,7 +88,7 @@ public:
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for (int curAxis = 0; curAxis < outputs[0].size(); curAxis++)
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{
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if (curAxis != cAxis && outputs[0][curAxis] != curShape[curAxis])
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CV_Error(Error::StsBadSize, "Inconsitent shape for ConcatLayer");
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CV_Error(Error::StsBadSize, "Inconsistent shape for ConcatLayer");
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}
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}
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@@ -185,7 +185,7 @@ static bool ocl4dnnFastImageGEMM(const CBLAS_TRANSPOSE TransA,
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int blockC_height = blocksize;
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int use_buffer_indicator = 8;
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// To fix the edge problem casued by the sub group block read.
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// To fix the edge problem caused by the sub group block read.
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// we have to pad the image if it's not multiple of tile.
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// just padding one line is enough as the sub group block read
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// will clamp to edge according to the spec.
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@@ -188,7 +188,7 @@ __kernel void ConvolveBasic(
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#define VLOAD4(_v, _p) do { _v = vload4(0, _p); } while(0)
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// Each work-item computes a OUT_BLOCK_WIDTH * OUT_BLOCK_HEIGHT region of one output map.
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// Each work-group (which will be mapped to 1 SIMD16/SIMD8 EU thread) will compute 16/8 different feature maps, but each feature map is for the same region of the imput image.
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// Each work-group (which will be mapped to 1 SIMD16/SIMD8 EU thread) will compute 16/8 different feature maps, but each feature map is for the same region of the input image.
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// NDRange: (output_width+pad)/ OUT_BLOCK_WIDTH, (output_height+pad)/OUT_BLOCK_HEIGHT, NUM_FILTERS/OUT_BLOCK_DEPTH
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// NOTE: for beignet this reqd_work_group_size does not guarantee that SIMD16 mode will be used, the compiler could choose to use two SIMD8 threads, and if that happens the code will break.
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@@ -220,7 +220,7 @@ convolve_simd(
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int in_addr;
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// find weights adress of given neuron (lid is index)
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// find weights address of given neuron (lid is index)
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unsigned int weight_addr = (fmg % (ALIGNED_NUM_FILTERS/SIMD_SIZE)) * INPUT_DEPTH * KERNEL_WIDTH * KERNEL_HEIGHT * SIMD_SIZE + lid;
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for(int i=0;i<OUT_BLOCK_SIZE;i++) {
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@@ -1096,9 +1096,9 @@ void TFImporter::populateNet(Net dstNet)
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dstNet.setInputsNames(netInputs);
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}
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else if (type == "Split") {
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// TODO: determing axis index remapping by input dimensions order of input blob
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// TODO: determining axis index remapping by input dimensions order of input blob
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// TODO: slicing input may be Const op
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// TODO: slicing kernels for convolutions - in current implenmentation it is impossible
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// TODO: slicing kernels for convolutions - in current implementation it is impossible
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// TODO: add parsing num of slices parameter
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CV_Assert(layer.input_size() == 2);
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// num_split
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