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Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests
* enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
This commit is contained in:
committed by
Alexander Alekhin
parent
4de1efd3c8
commit
1fac1421e5
@@ -141,6 +141,8 @@ TEST_P(Test_Caffe_layers, Convolution)
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TEST_P(Test_Caffe_layers, DeConvolution)
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{
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if(target == DNN_TARGET_CUDA_FP16)
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applyTestTag(CV_TEST_TAG_DNN_SKIP_CUDA_FP16);
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testLayerUsingCaffeModels("layer_deconvolution", true, false);
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}
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@@ -372,7 +374,13 @@ TEST_P(Test_Caffe_layers, Conv_Elu)
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net.setPreferableTarget(target);
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Mat out = net.forward();
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normAssert(ref, out, "", default_l1, default_lInf);
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double l1 = default_l1, lInf = default_lInf;
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if (target == DNN_TARGET_CUDA_FP16)
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{
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l1 = 0.0002;
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lInf = 0.0005;
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}
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normAssert(ref, out, "", l1, lInf);
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}
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class Layer_LSTM_Test : public ::testing::Test
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@@ -843,6 +851,11 @@ TEST_P(Test_Caffe_layers, PriorBox_repeated)
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double l1 = (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD) ? 1e-3 : 1e-5;
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double lInf = (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD) ? 1e-3 : 1e-4;
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if (target == DNN_TARGET_CUDA_FP16)
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{
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l1 = 7e-5;
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lInf = 0.0005;
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}
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normAssert(out, ref, "", l1, lInf);
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}
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@@ -876,7 +889,9 @@ TEST_P(Test_Caffe_layers, PriorBox_squares)
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0.25, 0.0, 1.0, 1.0,
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0.1f, 0.1f, 0.2f, 0.2f,
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0.1f, 0.1f, 0.2f, 0.2f);
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double l1 = (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD) ? 2e-5 : 1e-5;
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double l1 = 1e-5;
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if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD || target == DNN_TARGET_CUDA_FP16)
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l1 = 2e-5;
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normAssert(out.reshape(1, 4), ref, "", l1);
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}
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@@ -1225,6 +1240,11 @@ TEST_P(Test_DLDT_two_inputs, as_backend)
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// Output values are in range [0, 637.5].
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double l1 = (targetId == DNN_TARGET_OPENCL_FP16 || targetId == DNN_TARGET_MYRIAD) ? 0.06 : 1e-6;
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double lInf = (targetId == DNN_TARGET_OPENCL_FP16 || targetId == DNN_TARGET_MYRIAD) ? 0.3 : 1e-5;
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if (targetId == DNN_TARGET_CUDA_FP16)
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{
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l1 = 0.06;
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lInf = 0.3;
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}
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normAssert(out, ref, "", l1, lInf);
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}
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@@ -1537,8 +1557,17 @@ TEST_P(Layer_Test_ShuffleChannel, Accuracy)
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net.setPreferableTarget(targetId);
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Mat out = net.forward();
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double l1 = (targetId == DNN_TARGET_OPENCL_FP16) ? 5e-2 : 1e-5;
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double lInf = (targetId == DNN_TARGET_OPENCL_FP16) ? 7e-2 : 1e-4;
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double l1 = 1e-5, lInf = 1e-4;
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if (targetId == DNN_TARGET_OPENCL_FP16)
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{
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l1 = 5e-2;
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lInf = 7e-2;
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}
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else if (targetId == DNN_TARGET_CUDA_FP16)
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{
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l1 = 0.06;
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lInf = 0.07;
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}
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for (int n = 0; n < inpShapeVec[0]; ++n)
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{
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for (int c = 0; c < inpShapeVec[1]; ++c)
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@@ -1593,6 +1622,9 @@ TEST_P(Layer_Test_Eltwise_unequal, accuracy_input_0_truncate)
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int backendId = get<0>(get<1>(GetParam()));
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int targetId = get<1>(get<1>(GetParam()));
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if (backendId == DNN_BACKEND_CUDA)
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applyTestTag(CV_TEST_TAG_DNN_SKIP_CUDA);
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Net net;
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LayerParams lp;
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lp.type = "Eltwise";
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@@ -1656,6 +1688,9 @@ TEST_P(Layer_Test_Eltwise_unequal, accuracy_input_0)
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int backendId = get<0>(get<1>(GetParam()));
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int targetId = get<1>(get<1>(GetParam()));
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if (backendId == DNN_BACKEND_CUDA)
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applyTestTag(CV_TEST_TAG_DNN_SKIP_CUDA);
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Net net;
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LayerParams lp;
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lp.type = "Eltwise";
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