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Fixed v_reduce_sad intrinsics implementation and added tests
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@@ -1141,12 +1141,16 @@ inline v_float32x8 v_reduce_sum4(const v_float32x8& a, const v_float32x8& b,
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inline unsigned v_reduce_sad(const v_uint8x32& a, const v_uint8x32& b)
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{
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return (unsigned)_v_cvtsi256_si32(_mm256_sad_epu8(a.val, b.val));
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__m256i half = _mm256_sad_epu8(a.val, b.val);
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__m128i quarter = _mm_add_epi32(_v256_extract_low(half), _v256_extract_high(half));
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return (unsigned)_mm_cvtsi128_si32(_mm_add_epi32(quarter, _mm_unpackhi_epi64(quarter, quarter)));
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}
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inline unsigned v_reduce_sad(const v_int8x32& a, const v_int8x32& b)
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{
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__m256i half = _mm256_set1_epi8(0x7f);
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return (unsigned)_v_cvtsi256_si32(_mm256_sad_epu8(_mm256_add_epi8(a.val, half), _mm256_add_epi8(b.val, half)));
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half = _mm256_sad_epu8(_mm256_add_epi8(a.val, half), _mm256_add_epi8(b.val, half));
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__m128i quarter = _mm_add_epi32(_v256_extract_low(half), _v256_extract_high(half));
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return (unsigned)_mm_cvtsi128_si32(_mm_add_epi32(quarter, _mm_unpackhi_epi64(quarter, quarter)));
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}
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inline unsigned v_reduce_sad(const v_uint16x16& a, const v_uint16x16& b)
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{
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@@ -1486,13 +1486,14 @@ OPENCV_HAL_IMPL_SSE_REDUCE_OP_4(v_float32x4, float, min, std::min)
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inline unsigned v_reduce_sad(const v_uint8x16& a, const v_uint8x16& b)
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{
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return (unsigned)_mm_cvtsi128_si32(_mm_sad_epu8(a.val, b.val));
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__m128i half = _mm_sad_epu8(a.val, b.val);
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return (unsigned)_mm_cvtsi128_si32(_mm_add_epi32(half, _mm_unpackhi_epi64(half, half)));
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}
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inline unsigned v_reduce_sad(const v_int8x16& a, const v_int8x16& b)
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{
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__m128i half = _mm_set1_epi8(0x7f);
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return (unsigned)_mm_cvtsi128_si32(_mm_sad_epu8(_mm_add_epi8(a.val, half),
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_mm_add_epi8(b.val, half)));
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half = _mm_sad_epu8(_mm_add_epi8(a.val, half), _mm_add_epi8(b.val, half));
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return (unsigned)_mm_cvtsi128_si32(_mm_add_epi32(half, _mm_unpackhi_epi64(half, half)));
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}
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inline unsigned v_reduce_sad(const v_uint16x8& a, const v_uint16x8& b)
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{
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