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https://github.com/opencv/opencv.git
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Merge remote-tracking branch 'upstream/3.4' into merge-3.4
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@@ -102,7 +102,7 @@
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#define CV_INLINE_ROUND_DBL(value) \
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int out; \
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double temp; \
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__asm__( "fctiw %[temp],%[in]\n\tmffprwz %[out],%[temp]\n\t" : [out] "=r" (out), [temp] "=d" (temp) : [in] "d" ((double)(value)) : ); \
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__asm__( "fctiw %[temp],%[in]\n\tmfvsrwz %[out],%[temp]\n\t" : [out] "=r" (out), [temp] "=d" (temp) : [in] "d" ((double)(value)) : ); \
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return out;
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// FP32 also works with FP64 routine above
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@@ -1231,19 +1231,16 @@ inline int v_signmask(const v_int16x16& a)
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inline int v_signmask(const v_uint16x16& a)
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{ return v_signmask(v_reinterpret_as_s16(a)); }
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inline int v_signmask(const v_int32x8& a)
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{
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v_int16x16 a16 = v_pack(a, a);
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return v_signmask(v_pack(a16, a16)) & 0xFF;
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}
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inline int v_signmask(const v_uint32x8& a)
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{ return v_signmask(v_reinterpret_as_s32(a)); }
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inline int v_signmask(const v_float32x8& a)
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{ return _mm256_movemask_ps(a.val); }
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inline int v_signmask(const v_float64x4& a)
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{ return _mm256_movemask_pd(a.val); }
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inline int v_signmask(const v_int32x8& a)
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{ return v_signmask(v_reinterpret_as_f32(a)); }
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inline int v_signmask(const v_uint32x8& a)
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{ return v_signmask(v_reinterpret_as_f32(a)); }
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inline int v_scan_forward(const v_int8x32& a) { return trailingZeros32(v_signmask(v_reinterpret_as_s8(a))); }
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inline int v_scan_forward(const v_uint8x32& a) { return trailingZeros32(v_signmask(v_reinterpret_as_s8(a))); }
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inline int v_scan_forward(const v_int16x16& a) { return trailingZeros32(v_signmask(v_reinterpret_as_s8(a))) / 2; }
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@@ -1270,10 +1267,10 @@ inline int v_scan_forward(const v_float64x4& a) { return trailingZeros32(v_signm
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OPENCV_HAL_IMPL_AVX_CHECK(v_uint8x32, OPENCV_HAL_1ST, -1)
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OPENCV_HAL_IMPL_AVX_CHECK(v_int8x32, OPENCV_HAL_1ST, -1)
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OPENCV_HAL_IMPL_AVX_CHECK(v_uint16x16, OPENCV_HAL_AND, (int)0xaaaa)
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OPENCV_HAL_IMPL_AVX_CHECK(v_int16x16, OPENCV_HAL_AND, (int)0xaaaa)
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OPENCV_HAL_IMPL_AVX_CHECK(v_uint32x8, OPENCV_HAL_AND, (int)0x8888)
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OPENCV_HAL_IMPL_AVX_CHECK(v_int32x8, OPENCV_HAL_AND, (int)0x8888)
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OPENCV_HAL_IMPL_AVX_CHECK(v_uint16x16, OPENCV_HAL_AND, (int)0xaaaaaaaa)
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OPENCV_HAL_IMPL_AVX_CHECK(v_int16x16, OPENCV_HAL_AND, (int)0xaaaaaaaa)
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OPENCV_HAL_IMPL_AVX_CHECK(v_uint32x8, OPENCV_HAL_AND, (int)0x88888888)
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OPENCV_HAL_IMPL_AVX_CHECK(v_int32x8, OPENCV_HAL_AND, (int)0x88888888)
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#define OPENCV_HAL_IMPL_AVX_CHECK_FLT(_Tpvec, allmask) \
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inline bool v_check_all(const _Tpvec& a) \
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@@ -764,10 +764,10 @@ inline scalartype v_reduce_##suffix(const _Tpvec& a)
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rs = func(rs, vec_sld(rs, rs, 2)); \
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return vec_extract(func(rs, vec_sld(rs, rs, 1)), 0); \
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}
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_8(v_uint8x16, vec_uchar16, uchar, max, vec_max)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_8(v_uint8x16, vec_uchar16, uchar, min, vec_min)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_8(v_int8x16, vec_char16, schar, max, vec_max)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_8(v_int8x16, vec_char16, schar, min, vec_min)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_16(v_uint8x16, vec_uchar16, uchar, max, vec_max)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_16(v_uint8x16, vec_uchar16, uchar, min, vec_min)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_16(v_int8x16, vec_char16, schar, max, vec_max)
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OPENCV_HAL_IMPL_VSX_REDUCE_OP_16(v_int8x16, vec_char16, schar, min, vec_min)
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inline v_float32x4 v_reduce_sum4(const v_float32x4& a, const v_float32x4& b,
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const v_float32x4& c, const v_float32x4& d)
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@@ -363,10 +363,12 @@ VSX_FINLINE(Tvec) vec_popcntu(const Tvec2& a) \
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VSX_IMPL_POPCNTU(vec_uchar16, vec_char16, vec_uchar16_c);
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VSX_IMPL_POPCNTU(vec_ushort8, vec_short8, vec_ushort8_c);
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VSX_IMPL_POPCNTU(vec_uint4, vec_int4, vec_uint4_c);
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VSX_IMPL_POPCNTU(vec_udword2, vec_dword2, vec_udword2_c);
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// redirect unsigned types
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VSX_REDIRECT_1RG(vec_uchar16, vec_uchar16, vec_popcntu, vec_popcnt)
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VSX_REDIRECT_1RG(vec_ushort8, vec_ushort8, vec_popcntu, vec_popcnt)
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VSX_REDIRECT_1RG(vec_uint4, vec_uint4, vec_popcntu, vec_popcnt)
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VSX_REDIRECT_1RG(vec_udword2, vec_udword2, vec_popcntu, vec_popcnt)
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// converts between single and double precision
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VSX_REDIRECT_1RG(vec_float4, vec_double2, vec_cvfo, __builtin_vsx_xvcvdpsp)
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