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Merge pull request #28889 from abhishek-gola:simd_kernel_speedup

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SIMD Kernel speedup for DNN layers #28889

This PR add following speedups for Grounding Dino tiny model.

For Device:  Intel(R) Core(TM) i9-14900KS, x86, 32 Cores, ubuntu 24.04,
| Model | `ENGINE_NEW (Before)` | `ENGINE_NEW (After)` | `ENGINE_ORT` |
| :--- | :--- | :--- | :--- | 
| **Grounding Dino Tiny** | 3130 ms | 1872.06 ms| 1800.18 ms|

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [x] There is a reference to the original bug report and related work
- [x] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [x] The feature is well documented and sample code can be built with the project CMake
This commit is contained in:
Abhishek Gola
2026-05-21 18:23:15 +05:30
committed by GitHub
parent 1d54398f07
commit 0a8603b3ac
21 changed files with 1850 additions and 236 deletions
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modules/core/src/matrix_transform.cpp
+7 -32
View File
@@ -7,6 +7,9 @@
#include "hal_replacement.hpp"
#include "opencv2/core/detail/dispatch_helper.impl.hpp"
#include "transpose.simd.hpp"
#include "transpose.simd_declarations.hpp"
#include <algorithm> // std::swap_ranges
#include <numeric> // std::accumulate
@@ -179,38 +182,10 @@ static void transpose_16bit_simd(const uchar* src, size_t sstep, uchar* dst, siz
static void transpose_32bit_simd(const uchar* src, size_t sstep, uchar* dst, size_t dstep, Size sz)
{
const uint32_t* src32 = reinterpret_cast<const uint32_t*>(src);
uint32_t* dst32 = reinterpret_cast<uint32_t*>(dst);
const size_t sstep_e = sstep / sizeof(uint32_t);
const size_t dstep_e = dstep / sizeof(uint32_t);
const int m = sz.width, n = sz.height;
int i = 0;
for (; i <= m - 4; i += 4)
{
int j = 0;
for (; j <= n - 4; j += 4)
{
v_uint32x4 r0 = v_load(src32 + i + sstep_e*(j+0));
v_uint32x4 r1 = v_load(src32 + i + sstep_e*(j+1));
v_uint32x4 r2 = v_load(src32 + i + sstep_e*(j+2));
v_uint32x4 r3 = v_load(src32 + i + sstep_e*(j+3));
v_uint32x4 o0, o1, o2, o3;
v_transpose4x4(r0, r1, r2, r3, o0, o1, o2, o3);
v_store(dst32 + dstep_e*(i+0) + j, o0);
v_store(dst32 + dstep_e*(i+1) + j, o1);
v_store(dst32 + dstep_e*(i+2) + j, o2);
v_store(dst32 + dstep_e*(i+3) + j, o3);
}
for (; j < n; j++)
for (int k = 0; k < 4; k++)
dst32[dstep_e*(i+k) + j] = src32[i + sstep_e*j + k];
}
for (; i < m; i++)
for (int j = 0; j < n; j++)
dst32[dstep_e*i + j] = src32[i + sstep_e*j];
// Cache-blocked + AVX2-aware path lives in transpose.simd.hpp; pick the
// best variant available at runtime.
CV_CPU_DISPATCH(transpose_32bit_blocks_simd, (src, sstep, dst, dstep, sz),
CV_CPU_DISPATCH_MODES_ALL);
}
static void transpose_48bit_simd(const uchar* src, size_t sstep, uchar* dst, size_t dstep, Size sz)